/**
  ******************************************************************************
  * @file    gt32f030_vc.h
  * @author  GT Application Team
  * @version V1.0.0
  * @date    03-January-2025
  *
  ******************************************************************************
  * @attention
  *
  * <h2><center>&copy; COPYRIGHT 2022 Giantec Semicondutor Inc</center></h2>
  *
  *             http://www.giantec-semi.com/
  *
  * Unless required by applicable law or agreed to in writing, software
  * distributed under the License is distributed on an "AS IS" BASIS,
  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  * See the License for the specific language governing permissions and
  * limitations under the License.
  *
  ******************************************************************************
  */

/* Define to prevent recursive inclusion -------------------------------------*/

#ifndef __GT32F030_VC_H
#define __GT32F030_VC_H

#ifdef __cplusplus
 extern "C" {
#endif

/* Includes ------------------------------------------------------------------*/

#include "gt32f030.h"

/** @addtogroup GT32F030_StdPeriph_Driver
  * @{
  */

/** @addtogroup VC
  * @{
  */

/* Exported constants --------------------------------------------------------*/

/** @defgroup VC_Selection
  * @{
  */

typedef enum {
  VC1 = 0x01,
  VC2 = 0x02,
} VCSelection_TypeDef;

#define IS_VC_ALL_PERIPH(PERIPH) (((PERIPH) == VC1) || \
                                  ((PERIPH) == VC2))

/**
  * @}
  */

/** @defgroup VC_WindowMode
  * @{
  */

typedef enum {
  VC_Window_Mode_Disable = 0x00,
  VC_Window_Mode_VC1 = 0x01,
  VC_Window_Mode_VC2 = 0x02,
} VCWindowMode_TypeDef;

#define IS_VC_WINDOW_MODE(MODE) (((MODE) == VC_Window_Mode_Disable) || \
                                ((MODE) == VC_Window_Mode_VC1) || \
                                ((MODE) == VC_Window_Mode_VC2))

/**
  * @}
  */

/** @defgroup VC_Output_TriggerMode
  * @{
  */

typedef enum {
  VC_Trigger_None = 0x00,
  VC_Trigger_HighLevel = 0x01,
  VC_Trigger_RisingEdge = 0x02,
  VC_Trigger_FallingEdge = 0x04,
} VCOutputTriggerMode_TypeDef;

#define IS_VC_OUTPUT_TRIGGER_MODE(MODE) (((MODE) == VC_Trigger_HighLevel) || \
                                        ((MODE) == VC_Trigger_RisingEdge) || \
                                        ((MODE) == VC_Trigger_FallingEdge))

/**
  * @}
  */

/** @defgroup VC_Output_Polarity
  * @{
  */

typedef enum {
  VC_Output_Polarity_Low = 0x00,
  VC_Output_Polarity_High = 0x01,
} VCOutputPolarity_TypeDef;

#define IS_VC_OUTPUT_POLARITY(POLARITY) (((POLARITY) == VC_Output_Polarity_Low) || \
                                        ((POLARITY) == VC_Output_Polarity_High))

/**
  * @}
  */

/** @defgroup VC_Input_PSel
  * @{
  */

typedef enum {
  VC_Input_PSel_PB8_PB4 = 0x00,
  VC_Input_PSel_PB2_PA1 = 0x01,
  VC_Input_PSel_PA3_PF3 = 0x02,
  VC_Input_PSel_PB6_PF0 = 0x03,
} VCInputPSel_TypeDef;

#define IS_VC_INPUT_PSel(PSel) (((PSel) == VC_Input_PSel_PB8_PB4) || \
                                ((PSel) == VC_Input_PSel_PB2_PA1) || \
                                ((PSel) == VC_Input_PSel_PA3_PF3) || \
                                ((PSel) == VC_Input_PSel_PB6_PF0))

/**
  * @}
  */

/** @defgroup VC_Input_NSel
  * @{
  */

typedef enum {
  VC_Input_NSel_VDDA = 0x00,
  VC_Input_NSel_VTS = 0x01,
  VC_Input_NSel_PB1_PB3 = 0x02,
  VC_Input_NSel_PA0_PA2 = 0x03,
  VC_Input_NSel_VREF_1T04 = 0x04,
  VC_Input_NSel_VREF_2T04 = 0x05,
  VC_Input_NSel_VREF_3T04 = 0x06,
  VC_Input_NSel_VREF = 0x07,
} VCInputNSel_TypeDef;

#define IS_VC_INPUT_NSel(NSel) (((NSel) == VC_Input_NSel_VDDA) || \
                                ((NSel) == VC_Input_NSel_VTS) || \
                                ((NSel) == VC_Input_NSel_PB1_PB3) || \
                                ((NSel) == VC_Input_NSel_PA0_PA2) || \
                                ((NSel) == VC_Input_NSel_VREF_1T04) || \
                                ((NSel) == VC_Input_NSel_VREF_2T04) || \
                                ((NSel) == VC_Input_NSel_VREF_3T04) || \
                                ((NSel) == VC_Input_NSel_VREF))

/** @defgroup VC_Filter_ClockSel
  * @{
  */

typedef enum {
  VC_Filter_Clock_PCLK = 0x00,
  VC_Filter_Clock_LIRC = 0x01,
} VCFilterClock_TypeDef;

#define IS_VC_FILTER_CLOCK(CLK) (((CLK) == VC_Filter_Clock_PCLK) || \
                                  ((CLK) == VC_Filter_Clock_LIRC))

/**
  * @}
  */

/** @defgroup VC_Int_Output_Brake_Selection
  * @{
  */

#define VC_Int_Output_TIM2_BRAKE                     ((uint32_t)0x00000001)
#define VC_Int_Output_TIM3_BRAKE                     ((uint32_t)0x00000002)
#define VC_Int_Output_TIM4_BRAKE                     ((uint32_t)0x00000004)
#define VC_Int_Output_TIM5_BRAKE                     ((uint32_t)0x00000008)

#define VC_INT_OUTPUT_BRAKE_MASK                     ((uint32_t)0x0000000F)
#define IS_VC_INT_OUTPUT_BRAKE(BRAKE)                (((BRAKE) & VC_INT_OUTPUT_BRAKE_MASK) != (uint32_t)0x00000000)

/**
  * @}
  */

#define IS_VC_FILTER_NUMBER(NUM)                     ((NUM) <= 0x000000FF)

/** @defgroup VC_Filter_Output_Gate_Selection
  * @{
  */

#define VC_Filter_Output_Gate_TIM2_CH4G                     ((uint32_t)0x00000001)
#define VC_Filter_Output_Gate_TIM2_CH3G                     ((uint32_t)0x00000002)
#define VC_Filter_Output_Gate_TIM2_CH2G                     ((uint32_t)0x00000004)
#define VC_Filter_Output_Gate_TIM2_CH1G                     ((uint32_t)0x00000008)
#define VC_Filter_Output_Gate_TIM2_CH4G_Inverted            ((uint32_t)0x00000010)
#define VC_Filter_Output_Gate_TIM2_CH3G_Inverted            ((uint32_t)0x00000020)
#define VC_Filter_Output_Gate_TIM2_CH2G_Inverted            ((uint32_t)0x00000040)
#define VC_Filter_Output_Gate_TIM2_CH1G_Inverted            ((uint32_t)0x00000080)
#define VC_Filter_Output_Gate_TIM3_CH4G                     ((uint32_t)0x00000100)
#define VC_Filter_Output_Gate_TIM3_CH3G                     ((uint32_t)0x00000200)
#define VC_Filter_Output_Gate_TIM3_CH2G                     ((uint32_t)0x00000400)
#define VC_Filter_Output_Gate_TIM3_CH1G                     ((uint32_t)0x00000800)
#define VC_Filter_Output_Gate_TIM3_CH4G_Inverted            ((uint32_t)0x00001000)
#define VC_Filter_Output_Gate_TIM3_CH3G_Inverted            ((uint32_t)0x00002000)
#define VC_Filter_Output_Gate_TIM3_CH2G_Inverted            ((uint32_t)0x00004000)
#define VC_Filter_Output_Gate_TIM3_CH1G_Inverted            ((uint32_t)0x00008000)
#define VC_Filter_Output_Gate_TIM4_CH4G                     ((uint32_t)0x00010000)
#define VC_Filter_Output_Gate_TIM4_CH3G                     ((uint32_t)0x00020000)
#define VC_Filter_Output_Gate_TIM4_CH2G                     ((uint32_t)0x00040000)
#define VC_Filter_Output_Gate_TIM4_CH1G                     ((uint32_t)0x00080000)
#define VC_Filter_Output_Gate_TIM4_CH4G_Inverted            ((uint32_t)0x00100000)
#define VC_Filter_Output_Gate_TIM4_CH3G_Inverted            ((uint32_t)0x00200000)
#define VC_Filter_Output_Gate_TIM4_CH2G_Inverted            ((uint32_t)0x00400000)
#define VC_Filter_Output_Gate_TIM4_CH1G_Inverted            ((uint32_t)0x00800000)
#define VC_Filter_Output_Gate_TIM5_CH4G                     ((uint32_t)0x01000000)
#define VC_Filter_Output_Gate_TIM5_CH3G                     ((uint32_t)0x02000000)
#define VC_Filter_Output_Gate_TIM5_CH2G                     ((uint32_t)0x04000000)
#define VC_Filter_Output_Gate_TIM5_CH1G                     ((uint32_t)0x08000000)
#define VC_Filter_Output_Gate_TIM5_CH4G_Inverted            ((uint32_t)0x10000000)
#define VC_Filter_Output_Gate_TIM5_CH3G_Inverted            ((uint32_t)0x20000000)
#define VC_Filter_Output_Gate_TIM5_CH2G_Inverted            ((uint32_t)0x40000000)
#define VC_Filter_Output_Gate_TIM5_CH1G_Inverted            ((uint32_t)0x80000000)

#define VC_FILTER_OUTPUT_GATE_MASK                          ((uint32_t)0xFFFFFFFF)
#define IS_VC_FILTER_OUTPUT_GATE(GATE)                      (((GATE) & VC_FILTER_OUTPUT_GATE_MASK) != (uint32_t)0x00000000)

/**
  * @}
  */

/* Exported types ------------------------------------------------------------*/

/**
  * @brief  VC Config structure definition
  */

typedef struct {
  VCWindowMode_TypeDef  VC_Window_Cmd;
  FunctionalState       VC_Deglitchen_Cmd;
} VC_ConfigTypeDef;

/**
  * @brief  VC Init structure definition
  */

typedef struct {
  VCOutputTriggerMode_TypeDef  VC_Output_Trigger;
  VCOutputPolarity_TypeDef     VC_Output_Polarity;
  VCInputPSel_TypeDef          VC_Input_PSel;
  VCInputNSel_TypeDef          VC_Input_NSel;
  FunctionalState              VC_Cmd;
} VC_InitTypeDef;

/**
  * @brief  VC Filter Init structure definition
  */

typedef struct {
  VCFilterClock_TypeDef  VCFilter_ClockSource;
  uint16_t               VCFilter_Number;
  uint32_t               VCFilter_Output;
  FunctionalState        VCFilter_Cmd;
} VC_FilterInitTypeDef;

/**
  * @brief  VC Int Init structure definition
  */

typedef struct {
  uint8_t VCInt_Output;
  FunctionalState VCInt_Cmd;
} VC_IntInitTypeDef;

/* Exported functions --------------------------------------------------------*/

void VC_Config(VC_ConfigTypeDef *VC_Config);

void VC_DeInit(void);
void VC_Init(VCSelection_TypeDef VCx, VC_InitTypeDef *VC_InitStruct);
void VC_StructInit(VC_InitTypeDef *VC_InitStruct);
void VC_Cmd(VCSelection_TypeDef VCx, FunctionalState NewState);

void VC_FilterInit(VCSelection_TypeDef VCx, VC_FilterInitTypeDef *VC_FilterInitStruct);
void VC_FilterStructInit(VC_FilterInitTypeDef *VC_FilterInitStruct);
void VC_FilterCmd(VCSelection_TypeDef VCx, FunctionalState NewState);

void VC_IntInit(VCSelection_TypeDef VCx, VC_IntInitTypeDef *VC_IntInitStruct);
void VC_IntStructInit(VC_IntInitTypeDef *VC_IntInitStruct);

void VC_ITConfig(VCSelection_TypeDef VCx, FunctionalState NewState);
void VC_ClearIT(VCSelection_TypeDef VCx);

#ifdef __cplusplus
}
#endif

#endif /* __GT32F030_VC_H */

/**
  * @}
  */

/**
  * @}
  */

/************************ (C) COPYRIGHT Giantec Semicondutor Inc *****END OF FILE****/

